Nanoelectronics 기반 Single Electron Transistor 기술
- 작성자관리자
- 배포일2017.06.02
- 조회수805
ㅇ 제목 : Nanoelectronics 기반 Single Electron Transistor 기술
ㅇ 일시 : 2017년 6월 21일 (수), 오후 4:00 ~ 6:00
ㅇ 장소 : ETRI 3동 307호 회의실
ㅇ 강사 : 최중범 교수 (충북대학교 물리학과)
ㅇ 요약 :
As integration density of current microprocessor increases with scaling-down process, total power consumption per chip increases rapidly, and the number of electrons for switching transistor on and off needs to be much more reduced. Single-electron transistor (SET) is an ultimate limit of electronic switching devices, and its basic philosophy is a manipulation of the individual charge and how to make applications to the future Tb-scale high density digital electronics with ultra-low power. The single-electron multiple-valued (MV) memory can be implemented by utilizing the threshold quantization of a floating dot MOS memory, while multiple switching on/off of the SET enables the MV logic schemes. In this presentation, the state-of-the-art SET technology developed at CBNU will be introduced, particularly focusing on a first successful implementation of CMOS-compatible multi-switching Si SET operating at room-temperature. My talk includes SET-based flexible multi-valued two-input NAND/NOR and XOR gates, which play crucial roles as essential device element building blocks for the future Tbit ultra-low power SET MV logic. Finally, the future possible NBIC(Nano-Bio-Info-Cognition) system applications of the SET will be also addressed.